| Change Proposal 289(CP289) is intended to address components that cannot use the portability requirements defined in section 3.2 of the SCA Core Specification. Specifically, it defines specific portability requirements that target resource constrained environments such as digital signal processors (DSPs), field-programmable gate arrays (FPGAs) and application specific integrated circuits (ASICs). In this paper, we present our implementation of the CP289 specification with regards to FPGAs, leading to the use of such components in >2GHz applications.
The Open Core Protocol (OCP) provides a non-proprietary, openly licensed, core centric protocol that specifies the interconnection of intellectual property (IP) cores for FPGAs and ASICs. CP289 uses OCP to provide the basis for definition by which all FPGA component interfaces are described and is responsible for communicating data between components collocated on the same container, and in the container itself. The configuration for each interface is specified within the CP289 specification by an OCP profile.
This paper defines a set of transformations that describe how the information needed to construct an OCP interface is discovered. These transformations are applied using the appropriate Software Component Descriptor (SCD), Software Package Descriptor (SPD), and CORBA Interface Definition from the SCA component definition that is equally applicable to general-purpose processors.
This paper focuses on a methodology used to transform high-level component, package, and property descriptions into synthesizable HDL interfaces that facilitate component communication. The FPGA component developer is then responsible for providing the HDL that is necessary to describe the functional processing that the worker is intended to provide. Some of this HDL may become part of the HDL that gets generated by the tool. However, in its current state, our software utility generates HDL-specific interfaces descriptions exclusively. |